41 search results - page 2 / 9 » Exploiting program cyclic behavior to reduce memory latency ... |
DAC
2012
ACM
11 years 6 months ago
2012
ACM
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
CC
2003
Springer
13 years 9 months ago
2003
Springer
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...
HIPEAC
2010
Springer
14 years 1 months ago
2010
Springer
Abstract. This paper presents remote store programming (RSP), a programming paradigm which combines usability and efficiency through the exploitation of a simple hardware mechanism...
ICCD
2008
IEEE
13 years 10 months ago
2008
IEEE
— We developed an SMT processor that allows a static WCET analysis of several hard real-time threads and uses the remaining resources for soft or non real-time threads. The analy...
ISCA
1995
IEEE
13 years 8 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...