4 search results - page 1 / 1 » Exploiting spare resources of in-order SMT processors execut... |
ARCS
2010
Springer
13 years 10 months ago
2010
Springer
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...
ICCD
2008
IEEE
13 years 10 months ago
2008
IEEE
— We developed an SMT processor that allows a static WCET analysis of several hard real-time threads and uses the remaining resources for soft or non real-time threads. The analy...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper presents Threaded Multi-Path Execution (TME), which exploits existing hardware on a Simultaneous Multithreading (SMT) processor to speculatively execute multiple paths ...
CASES
2005
ACM
13 years 6 months ago
2005
ACM
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...