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CGO
2005
IEEE
13 years 11 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
SAMOS
2010
Springer
13 years 3 months ago
OpenCL-based design methodology for application-specific processors
OpenCL is a programming language standard which enables the programmer to express the application by structuring its computation as kernels. The OpenCL compiler is given the explic...
Pekka O. Jaskelainen, Carlos S. de La Lama, Pablo ...
EUROSYS
2010
ACM
14 years 2 months ago
Kivati: Fast Detection and Prevention of Atomicity Violations
Bugs in concurrent programs are extremely difficult to find and fix during testing. In this paper, we propose Kivati, which can efficiently detect and prevent atomicity violat...
Lee Chew, David Lie
RTAS
2005
IEEE
13 years 11 months ago
Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
Harini Ramaprasad, Frank Mueller