Sciweavers

22 search results - page 1 / 5
» Exploiting the Parallelism Exposed by Partial Evaluation
Sort
View
IFIPPACT
1994
13 years 6 months ago
Exploiting the Parallelism Exposed by Partial Evaluation
: We describe an approach to parallel compilation that seeks to harness the vast amount of ne-grain parallelism that is exposed through partial evaluation of numerically-intensive ...
Rajeev J. Surati, Andrew A. Berlin
PPOPP
2005
ACM
13 years 10 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
SC
2003
ACM
13 years 10 months ago
Compiler Support for Exploiting Coarse-Grained Pipelined Parallelism
The emergence of grid and a new class of data-driven applications is making a new form of parallelism desirable, which we refer to as coarse-grained pipelined parallelism. This pa...
Wei Du, Renato Ferreira, Gagan Agrawal
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
13 years 10 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
13 years 4 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....