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TASE
2007
IEEE
13 years 10 months ago
Symmetry Reduced Model Checking for B
Symmetry reduction is a technique that can help alleviate the problem of state space explosion in model checking. The idea is to verify only a subset of states from each class (or...
Edd Turner, Michael Leuschel, Corinna Spermann, Mi...
CONCUR
2006
Springer
13 years 6 months ago
Model Checking Quantified Computation Tree Logic
Propositional temporal logic is not suitable for expressing properties on the evolution of dynamically allocated entities over time. In particular, it is not possible to trace such...
Arend Rensink
ASM
2010
ASM
13 years 7 months ago
A Refinement-Based Correctness Proof of Symmetry Reduced Model Checking
Symmetry reduction is a model checking technique that can help alleviate the problem of state space explosion, by preventing redundant state space exploration. In previous work, we...
Edd Turner, Michael J. Butler, Michael Leuschel
FCCM
2000
IEEE
133views VLSI» more  FCCM 2000»
13 years 9 months ago
Configuration Caching Management Techniques for Reconfigurable Computing
Although run-time reconfigurable systems have been shown to achieve very high performance, the speedups over traditional microprocessor systems are limited by the cost of configur...
Zhiyuan Li, Katherine Compton, Scott Hauck
ATVA
2007
Springer
90views Hardware» more  ATVA 2007»
13 years 8 months ago
Efficient Approximate Verification of Promela Models Via Symmetry Markers
We present a new verification technique for Promela which exploits state-space symmetries induced by scalarset values used in a model. The technique involves efficiently computing ...
Dragan Bosnacki, Alastair F. Donaldson, Michael Le...