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» Extensible On-Chip Peripherals
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IPPS
2000
IEEE
9 years 8 months ago
Performance of On-Chip Multiprocessors for Vision Tasks
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
Yongwha Chung, K. Park, W. Hahn, Neungsoo Park, Vi...
ISCA
2008
IEEE
125views Hardware» more  ISCA 2008»
9 years 10 months ago
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support
Current state-of-the-art on-chip networks provide efficiency, high throughput, and low latency for one-to-one (unicast) traffic. The presence of one-to-many (multicast) or one-t...
Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H....
TVLSI
2008
164views more  TVLSI 2008»
9 years 3 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
10 years 19 days ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
ISCAS
2005
IEEE
146views Hardware» more  ISCAS 2005»
9 years 9 months ago
A novel approach for network on chip emulation
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
Nicolas Genko, David Atienza, Giovanni De Micheli,...
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