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» Extensible On-Chip Peripherals
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IPPS
2007
IEEE
13 years 10 months ago
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
Christopher Claus, Florian Helmut Müller, Joh...
FPL
2007
Springer
94views Hardware» more  FPL 2007»
13 years 9 months ago
An OCM based shared Memory controller for Virtex 4
In this paper, we present a shared instruction and data memory controller for the On-Chip Memory (OCM) bus of the PowerPC embedded in the Virtex-4 chip. The traditional design of ...
Bas Breijer, Filipa Duarte, Stephan Wong
RTSS
2008
IEEE
13 years 10 months ago
Coscheduling of CPU and I/O Transactions in COTS-Based Embedded Systems
Integrating COTS components in critical real-time systems is challenging. In particular, we show that the interference between cache activity and I/O traffic generated by COTS pe...
Rodolfo Pellizzoni, Bach Duy Bui, Marco Caccamo, L...
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 4 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
MSE
2003
IEEE
104views Hardware» more  MSE 2003»
13 years 9 months ago
Internet-based Tool for System-on-Chip Integration
A tool has been created for use in a design course to automate integration of new components into a SystemOn-Chip (SoC). Students used this tool to implement a complete SoC Intern...
David Lim, Christopher E. Neely, Christopher K. Zu...