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» FPGA Implementations of the Massively Parallel GCA Model
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EUROPAR
2007
Springer
13 years 10 months ago
Hirschberg's Algorithm on a GCA and Its Parallel Hardware Implementation
We present in detail a GCA (Global Cellular Automaton) algorithm with 3n cells for Hirschberg’s algorithm which determines the connected components of a n-node undirected graph w...
Johannes Jendrsczok, Rolf Hoffmann, Jörg Kell...
JSA
2010
158views more  JSA 2010»
12 years 11 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
FPL
2007
Springer
94views Hardware» more  FPL 2007»
13 years 10 months ago
A Many-core Implementation based on the Reconfigurable Mesh Model
The reconfigurable mesh is a model for massively parallel computing for which many algorithms with very low complexity have been developed. These algorithms execute cycles of bus...
Heiner Giefers, Marco Platzner
CF
2007
ACM
13 years 8 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...