22 search results - page 5 / 5 » FPGA Interconnect Delay Fault Testing |
AHS
2006
IEEE
13 years 11 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...