Sciweavers

4 search results - page 1 / 1
» FPGA-based Design of a Large Moduli Multiplier for Public Ke...
Sort
View
ICCD
2006
IEEE
132views Hardware» more  ICCD 2006»
14 years 1 months ago
FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems
— High secure cryptographic systems require large bit-length encryption keys which presents a challenge to their efficient hardware implementation especially in embedded devices...
Osama Al-Khaleel, Christos A. Papachristou, Franci...
ASAP
2004
IEEE
127views Hardware» more  ASAP 2004»
13 years 8 months ago
A Public-Key Cryptographic Processor for RSA and ECC
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vi...
CRYPTO
2009
Springer
145views Cryptology» more  CRYPTO 2009»
13 years 11 months ago
Leakage-Resilient Public-Key Cryptography in the Bounded-Retrieval Model
We study the design of cryptographic primitives resilient to key-leakage attacks, where an attacker can repeatedly and adaptively learn information about the secret key, subject o...
Joël Alwen, Yevgeniy Dodis, Daniel Wichs
TC
2008
13 years 4 months ago
Automatic Generation of Modular Multipliers for FPGA Applications
Since redundant number systems allow for constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed,...
Jean-Luc Beuchat, Jean-Michel Muller