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GLVLSI
1996
IEEE
102views VLSI» more  GLVLSI 1996»
13 years 9 months ago
FPGA-based high performance page layout segmentation
Nalini K. Ratha, Anil K. Jain, Diane T. Rover
DAMON
2008
Springer
13 years 6 months ago
Avoiding version redundancy for high performance reads in temporal databases
A major performance bottleneck for database systems is the memory hierarchy. The performance of the memory hierarchy is directly related to how the content of disk pages maps to t...
Khaled Jouini, Geneviève Jomier
ICDAR
1999
IEEE
13 years 9 months ago
Methodology for Flexible and Efficient Analysis of the Performance of Page Segmentation Algorithms
This paper presents part of a new DIA performance analysis framework aimed at Layout Analysis algorithm developers. A new region-representation scheme (an interval-based descripti...
Apostolos Antonacopoulos, A. Brough
WWW
2007
ACM
14 years 5 months ago
Robust web page segmentation for mobile terminal using content-distances and page layout information
The demand of browsing information from general Web pages using a mobile phone is increasing. However, since the majority of Web pages on the Internet are optimized for browsing f...
Gen Hattori, Keiichiro Hoashi, Kazunori Matsumoto,...
ICPR
2008
IEEE
14 years 6 months ago
Background variability modeling for statistical layout analysis
Geometric layout analysis plays an important role in document image understanding. Many algorithms known in literature work well on standard document images, achieving high text l...
Faisal Shafait, Joost van Beusekom, Daniel Keysers...