2 search results - page 1 / 1 » Fast Cache and Bus Power Estimation for Parameterized System... |
DATE
2000
IEEE
13 years 10 months ago
2000
IEEE
We present a technique for fast estimation of the power consumed by the cache and bus sub-system of a parameterized system-on-a-chip design for a given application. The technique ...
CODES
2000
IEEE
13 years 10 months ago
2000
IEEE
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To b...