Sciweavers

12 search results - page 3 / 3
» Fast Layout Methods for Timetable Graphs
Sort
View
GD
2008
Springer
13 years 6 months ago
The Binary Stress Model for Graph Drawing
We introduce a new force-directed model for computing graph layout. The model bridges the two more popular force directed approaches – the stress and the electrical-spring models...
Yehuda Koren, Ali Civril
ICCAD
1999
IEEE
108views Hardware» more  ICCAD 1999»
13 years 10 months ago
Copy detection for intellectual property protection of VLSI designs
We give the first study of copy detection techniques for VLSI CAD applications; these techniques are complementary to previous watermarking-based IP protection methods in finding ...
Andrew B. Kahng, Darko Kirovski, Stefanus Mantik, ...