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IPPS
2009
IEEE
13 years 11 months ago
Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
ICPADS
2002
IEEE
13 years 9 months ago
Communication Pattern Based Methodology for Performance Analysis of Termination Detection Schemes
Efficient determination of processing termination at barrier synchronization points can occupy an important role in the overall throughput of parallel and distributed computing sy...
Yili Tseng, Ronald F. DeMara
HIPEAC
2011
Springer
12 years 4 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
SC
2009
ACM
13 years 11 months ago
FACT: fast communication trace collection for parallel applications through program slicing
A proper understanding of communication patterns of parallel applications is important to optimize application performance and design better communication subsystems. Communicatio...
Jidong Zhai, Tianwei Sheng, Jiangzhou He, Wenguang...
ANCS
2006
ACM
13 years 10 months ago
WormTerminator: an effective containment of unknown and polymorphic fast spreading worms
The fast spreading worm is becoming one of the most serious threats to today’s networked information systems. A fast spreading worm could infect hundreds of thousands of hosts w...
Songqing Chen, Xinyuan Wang, Lei Liu, Xinwen Zhang