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DSN
2007
IEEE
13 years 11 months ago
Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
CAMP
2005
IEEE
13 years 10 months ago
Bio-Inspired Computing Architectures: The Embryonics Approach
Abstract— The promise of next-generation computer technologies, such as nano-electronics, implies a number of serious alterations to the design flow of digital circuits. One of ...
Gianluca Tempesti, Daniel Mange, André Stau...
IOLTS
2009
IEEE
231views Hardware» more  IOLTS 2009»
13 years 11 months ago
Designing fault tolerant FSM by nano-PLA
— The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault toleran...
Samary Baranov, Ilya Levin, Osnat Keren, Mark G. K...
FPGA
2006
ACM
141views FPGA» more  FPGA 2006»
13 years 8 months ago
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
Dmitri B. Strukov, Konstantin Likharev
ET
2000
80views more  ET 2000»
13 years 4 months ago
A New Method for Testing Re-Programmable PLAs
: We present a method for obtaining a minimal set of test configurations and their associated set oftest patterns that completely tests re-programmable Programmable Logic Arrays (P...
Charles E. Stroud, James R. Bailey, Johan R. Emmer...