18 search results - page 4 / 4 » Fault Tolerant CMOS Logic Using Ternary Gates |
ISQED
2002
IEEE
13 years 10 months ago
2002
IEEE
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
MICRO
2006
IEEE
13 years 5 months ago
2006
IEEE
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
DAC
2001
ACM
14 years 6 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...