9 search results - page 2 / 2 » Fault Tolerant Design of Combinational and Sequential Logic ... |
MSS
2007
IEEE
13 years 12 months ago
2007
IEEE
This paper examines the application of Tornado Codes, a class of low density parity check (LDPC) erasure codes, to archival storage systems based on massive arrays of idle disks (...
DSD
2006
IEEE
13 years 11 months ago
2006
IEEE
Programmable logic arrays (PLAs) present an alternative to logic-gate based design. We propose the transistor level structure of a PLA for single-rail asynchronous applications. T...
CF
2004
ACM
13 years 11 months ago
2004
ACM
This paper discusses fault-tolerant techniques for SRAM-based FPGAs. These techniques can be based on circuit level modifications, with obvious modifications in the programmable a...
CODES
2007
IEEE
13 years 12 months ago
2007
IEEE
Multiprocessor SoCs are increasingly deployed in embedded systems with little or no security features built in. Code Injection attacks are one of the most commonly encountered sec...