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» Fault tolerant methods for reliability in FPGAs
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FPL
2008
Springer
112views Hardware» more  FPL 2008»
13 years 6 months ago
Fault tolerant methods for reliability in FPGAs
Reliability and process variability are serious issues for FPGAs in the future. Fortunately FPGAs have the ability to reconfigure in the field and at runtime, thus providing oppor...
Edward A. Stott, N. Pete Sedcole, Peter Y. K. Cheu...
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
14 years 1 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
GLVLSI
2005
IEEE
118views VLSI» more  GLVLSI 2005»
13 years 10 months ago
High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
Vishal Suthar, Shantanu Dutt
IOLTS
2006
IEEE
84views Hardware» more  IOLTS 2006»
13 years 10 months ago
Fault Tolerant System Design Method Based on Self-Checking Circuits
This paper describes a highly reliable digital circuit design method based on totally self checking blocks implemented in FPGAs. The bases of the self checking blocks are parity p...
Pavel Kubalík, Petr Fiser, Hana Kubatova
FPGA
2005
ACM
105views FPGA» more  FPGA 2005»
13 years 10 months ago
Soft error rate estimation and mitigation for SRAM-based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
Ghazanfar Asadi, Mehdi Baradaran Tahoori