Sciweavers

17 search results - page 2 / 4
» Faulty Logic: Reasoning about Fault Tolerant Programs
Sort
View
CL
2000
Springer
13 years 8 months ago
Modelling Digital Circuits Problems with Set Constraints
A number of diagnostic and optimisation problems in Electronics Computer Aided Design have usually been handled either by specific tools or by mapping them into a general problem s...
Francisco Azevedo, Pedro Barahona
TOOLS
2008
IEEE
13 years 10 months ago
Towards Raising the Failure of Unit Tests to the Level of Compiler-Reported Errors
Running unit tests suites with contemporary tools such as JUNIT can show the presence of bugs, but not their locations. This is different from checking a program with a compiler, w...
Friedrich Steimann, Thomas Eichstädt-Engelen,...
MICRO
2006
IEEE
159views Hardware» more  MICRO 2006»
13 years 4 months ago
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
EMSOFT
2005
Springer
13 years 10 months ago
Passive mid-stream monitoring of real-time properties
Passive monitoring or testing of complex systems and networks running in the field can provide valuable insights into their behavior in actual environments of use. In certain con...
Lalita Jategaonkar Jagadeesan, Ramesh Viswanathan
ICTAC
2010
Springer
13 years 2 months ago
Mechanized Verification with Sharing
We consider software verification of imperative programs by theorem proving in higher-order separation logic. Of particular interest are the difficulties of encoding and reasoning ...
J. Gregory Malecha, Greg Morrisett