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HPCA
2005
IEEE
14 years 6 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
PROMISE
2010
13 years 15 days ago
Case-based reasoning vs parametric models for software quality optimization
Background: There are many data mining methods but few comparisons between them. For example, there are at least two ways to build quality optimizers, programs that find project o...
Adam Brady, Tim Menzies
CASES
2007
ACM
13 years 9 months ago
Performance optimal processor throttling under thermal constraints
We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature co...
Ravishankar Rao, Sarma B. K. Vrudhula
INTERNET
2007
113views more  INTERNET 2007»
13 years 5 months ago
REST Eye for the SOA Guy
it’s hardly Earth-shattering: abstracting your business services and separating them from your applications can yield an overall system that’s easier to build, maintain, and ex...
Steve Vinoski
ICS
2001
Tsinghua U.
13 years 10 months ago
Slice-processors: an implementation of operation-based prediction
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...