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» Flits: Pervasive Computing for Processor and Memory Constrai...
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IPPS
2007
IEEE
13 years 11 months ago
Analyzing the Scalability of Graph Algorithms on Eldorado
The Cray MTA-2 system provides exceptional performance on a variety of sparse graph algorithms. Unfortunately, it was an extremely expensive platform. Cray is preparing an Eldorad...
Keith D. Underwood, Megan Vance, Jonathan W. Berry...
DAC
2004
ACM
14 years 5 months ago
Multi-profile based code compression
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
13 years 10 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
PPOPP
2006
ACM
13 years 11 months ago
Performance characterization of molecular dynamics techniques for biomolecular simulations
Large-scale simulations and computational modeling using molecular dynamics (MD) continues to make significant impacts in the field of biology. It is well known that simulations...
Sadaf R. Alam, Jeffrey S. Vetter, Pratul K. Agarwa...
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PPOPP
1990
ACM
13 years 9 months ago
Employing Register Channels for the Exploitation of Instruction Level Parallelism
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
Rajiv Gupta