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» Formal Verification of Security Model Using SPR Tool
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ATVA
2007
Springer
134views Hardware» more  ATVA 2007»
13 years 9 months ago
Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...
Moonzoo Kim
CII
2006
67views more  CII 2006»
13 years 5 months ago
A formal verification framework and associated tools for Enterprise Modeling: Application to UEML
The aim of this paper is to propose and apply a verification and validation approach to Enterprise Modeling that enables the user to improve the relevance and correctness, the sui...
Vincent Chapurlat, Bernard Kamsu Foguem, Fran&cced...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 2 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
TDSC
2008
152views more  TDSC 2008»
13 years 5 months ago
Towards Formal Verification of Role-Based Access Control Policies
Specifying and managing access control policies is a challenging problem. We propose to develop formal verification techniques for access control policies to improve the current s...
Somesh Jha, Ninghui Li, Mahesh V. Tripunitara, Qih...
ICSE
1999
IEEE-ACM
13 years 9 months ago
A Practical Method for Verifying Event-Driven Software
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...
Gerard J. Holzmann, Margaret H. Smith