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» Formal verification at higher levels of abstraction
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ICCAD
2007
IEEE
107views Hardware» more  ICCAD 2007»
13 years 10 months ago
Formal verification at higher levels of abstraction
velsofAbstraction DanielKroening,OxfordUniversity SanjitA.Seshia,UCBerkeley ICCADTutorial November8,2007
Daniel Kroening, Sanjit A. Seshia
FMCAD
2006
Springer
13 years 8 months ago
Formal Analysis and Verification of an OFDM Modem Design using HOL
In this paper we formally specify and verify an implementation of the IEEE802.11a standard physical layer based OFDM (Orthogonal Frequency Division Multiplexing) modem using the HO...
Abu Nasser Mohammed Abdullah, Behzad Akbarpour, So...
TPHOL
1998
IEEE
13 years 8 months ago
Program Abstraction in a Higher-Order Logic Framework
Abstraction in a Higher-Order Logic Framework Marco Benini Sara Kalvala Dirk Nowotka Department of Computer Science University of Warwick, Coventry, CV4 7AL, United Kingdom We pres...
Marco Benini, Sara Kalvala, Dirk Nowotka
FDL
2007
IEEE
13 years 8 months ago
Transactor-based Formal Verification of Real-time Embedded Systems
With the increasing complexity of today's embedded systems, there is a need to formally verify such designs at mixed abstraction levels. This is needed if some compoe describ...
Daniel Karlsson, Petru Eles, Zebo Peng
POPL
2010
ACM
14 years 1 months ago
A Relational Modal Logic for Higher-Order Stateful ADTs
The method of logical relations is a classic technique for proving the equivalence of higher-order programs that implement the same observable behavior but employ different intern...
Derek Dreyer, Georg Neis, Andreas Rossberg, Lars B...