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» Formal verification of LTL formulas for SystemC designs
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DATE
2006
IEEE
117views Hardware» more  DATE 2006»
13 years 11 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng
FDL
2008
IEEE
13 years 7 months ago
RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
Jinhyun Cho, Soonwoo Choi, Soo Chae
CDC
2008
IEEE
119views Control Systems» more  CDC 2008»
13 years 7 months ago
Formal analysis of timed continuous Petri nets
In this paper, we develop an automated framework for formal verification of timed continuous Petri nets (contPN). Specifically, we consider two problems: (1) given an initial set o...
Marius Kloetzer, Cristian Mahulea, Calin Belta, La...
EMSOFT
2010
Springer
13 years 3 months ago
PinaVM: a systemC front-end based on an executable intermediate representation
SystemC is the de facto standard for modeling embedded systems. It allows system design at various levels of abstractions, provides typical object-orientation features and incorpo...
Kevin Marquet, Matthieu Moy
ASWEC
2006
IEEE
13 years 12 months ago
Formal Verification of the IEEE 802.11i WLAN Security Protocol
With the increased usage of wireless LANs (WLANs), businesses and educational institutions are becoming more concerned about wireless network security. The latest WLAN security pr...
Elankayer Sithirasenan, Saad Zafar, Vallipuram Mut...