Sciweavers

8 search results - page 1 / 2
» From Application to ASIP-based FPGA Prototype: a Case Study ...
Sort
View
RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
13 years 12 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
TCAD
2011
12 years 12 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
TIT
2008
119views more  TIT 2008»
13 years 5 months ago
Bit-Level Equalization and Soft Detection for Gray-Coded Multilevel Modulation
This paper investigates iterative soft-in soft-out (SISO) detection in coded multiple access channels, with Gray-coded M-ary quadrature amplitude modulation (QAM) for the channel ...
Darryl Dexu Lin, Teng Joon Lim
FPL
2007
Springer
137views Hardware» more  FPL 2007»
13 years 11 months ago
Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...
Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
PC
2008
142views Management» more  PC 2008»
13 years 5 months ago
Performance analysis challenges and framework for high-performance reconfigurable computing
Reconfigurable computing (RC) applications employing both microprocessors and FPGAs have potential for large speedup when compared with traditional (software) parallel application...
Seth Koehler, John Curreri, Alan D. George