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ASPDAC
2008
ACM
107views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Full-chip thermal analysis for the early design stage via generalized integral transforms
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns ...
Pei-Yu Huang, Chih-Kang Lin, Yu-Min Lee
ISLPED
2006
ACM
99views Hardware» more  ISLPED 2006»
13 years 10 months ago
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power
All existing methods for thermal-via allocation are based on a steady-state thermal analysis and may lead to excessive number of thermal vias. This paper develops an accurate and ...
Hao Yu, Yiyu Shi, Lei He, Tanay Karnik
DAC
2009
ACM
13 years 11 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm