Sciweavers

7 search results - page 1 / 2
» Function-level power estimation methodology for microprocess...
Sort
View
DAC
2000
ACM
14 years 5 months ago
Function-level power estimation methodology for microprocessors
We have developed a function-level power estimation methodology for predicting the power dissipation of embedded software. For a given microprocessor core, we empirically build th...
Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag ...
SIGMETRICS
2003
ACM
129views Hardware» more  SIGMETRICS 2003»
13 years 9 months ago
Run-time modeling and estimation of operating system power consumption
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
Tao Li, Lizy Kurian John
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 1 months ago
Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques
— The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and highperformance mic...
Xiaoyao Liang, Kerem Turgay, David Brooks
PATMOS
2007
Springer
13 years 10 months ago
Exploiting Input Variations for Energy Reduction
The deep submicron semiconductor technologies will make the worst-case design impossible, since they can not provide design margins that it requires. Research directions should go ...
Toshinori Sato, Yuji Kunitake
ICCD
2006
IEEE
312views Hardware» more  ICCD 2006»
14 years 1 months ago
A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals
— Leakage power dissipation becomes a dominant component in operation power in nanometer devices. This paper describes a design methodology to implement runtime power gating in a...
Kimiyoshi Usami, Naoaki Ohkubo