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HIPS
1998
IEEE
13 years 8 months ago
Further Results for Improving Loop Interchange in Non-Adjacent and Imperfectly Nested Loops
Loop interchange is a powerful restructuring technique for supporting vectorization and parallelization. In this paper, we propose a technique which is better to determine whether...
Tsung-Chuan Huang, Cheng-Ming Yang
TJS
2002
121views more  TJS 2002»
13 years 3 months ago
Precise Data Locality Optimization of Nested Loops
A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. In...
Vincent Loechner, Benoît Meister, Philippe C...
IPPS
2007
IEEE
13 years 10 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
CASES
2008
ACM
13 years 6 months ago
Control flow optimization in loops using interval analysis
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 2 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou