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» Generalized Tardiness Bounds for Global Multiprocessor Sched...
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CODES
2007
IEEE
10 years 10 months ago
Predator: a predictable SDRAM memory controller
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
Benny Akesson, Kees Goossens, Markus Ringhofer
ICPP
1998
IEEE
10 years 8 months ago
Improving Parallel-Disk Buffer Management using Randomized Writeback
We address the problems of I/O scheduling and buffer management for general reference strings in a parallel I/O system. Using the standard parallel disk model withD disks and a sh...
Mahesh Kallahalla, Peter J. Varman
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