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» Generating SIMD Vectorized Permutations
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ICCD
2001
IEEE
140views Hardware» more  ICCD 2001»
14 years 1 months ago
Cost-effective Hardware Acceleration of Multimedia Applications
General-purpose microprocessors augmented with SIMD execution units enhance multimedia applications by exploiting data level parallelism. However, supporting/overhead related inst...
Deependra Talla, Lizy Kurian John
CC
2005
Springer
124views System Software» more  CC 2005»
13 years 10 months ago
Boosting the Performance of Multimedia Applications Using SIMD Instructions
Modern processors’ multimedia extensions (MME) provide SIMD ISAs to boost the performance of typical operations in multimedia applications. However, automatic vectorization suppo...
Weihua Jiang, Chao Mei, Bo Huang, Jianhui Li, Jiah...
PLDI
2004
ACM
13 years 10 months ago
Vectorization for SIMD architectures with alignment constraints
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...
Alexandre E. Eichenberger, Peng Wu, Kevin O'Brien
IPPS
2002
IEEE
13 years 9 months ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel
ARITH
2005
IEEE
13 years 10 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...