Sciweavers

456 search results - page 1 / 92
» Generating high performance pruned FFT implementations
Sort
View
ICASSP
2009
IEEE
13 years 8 months ago
Generating high performance pruned FFT implementations
We derive a recursive general-radix pruned Cooley-Tukey fast Fourier transform (FFT) algorithm in Kronecker product notation. The algorithm is compatible with vectorization and pa...
Franz Franchetti, Markus Püschel
ICASSP
2011
IEEE
12 years 8 months ago
Energy-optimized high performance FFT processor
This paper proposes an ultra low energy FFT processor suitable for sensor applications. The processor is based on R4MDC but achieves full utilization of computational elements. It...
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, D...
HPCC
2007
Springer
13 years 10 months ago
Adaptive Computation of Self Sorting In-Place FFTs on Hierarchical Memory Architectures
Computing ”in-place and in-order”FFT poses a very difficult problem on hierarchical memory architectures where data movement can seriously degrade the performance. In this pape...
Ayaz Ali, S. Lennart Johnsson, Jaspal Subhlok
ICASSP
2008
IEEE
13 years 11 months ago
Systematic generation of FPGA-based FFT implementations
In this paper, we propose a systemic approach for synthesizing field-programmable gate array (FPGA) implementations of fast Fourier transform (FFT) computations. Our approach cons...
Hojin Kee, Newton Petersen, Jacob Kornerup, Shuvra...
ICS
2007
Tsinghua U.
13 years 10 months ago
Scheduling FFT computation on SMP and multicore systems
Increased complexity of memory systems to ameliorate the gap between the speed of processors and memory has made it increasingly harder for compilers to optimize an arbitrary code...
Ayaz Ali, S. Lennart Johnsson, Jaspal Subhlok