Sciweavers

44 search results - page 2 / 9
» Generation of Executable Representation for Processor Simula...
Sort
View
FASE
2008
Springer
13 years 6 months ago
Translating Model Simulators to Analysis Models
We present a novel approach for the automatic generation of model-to-model transformations given a description of the operational semantics of the source language by means of graph...
Juan de Lara, Hans Vangheluwe
ISCA
2008
IEEE
205views Hardware» more  ISCA 2008»
13 years 11 months ago
VEAL: Virtualized Execution Accelerator for Loops
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
Nathan Clark, Amir Hormati, Scott A. Mahlke
ICCAD
2004
IEEE
100views Hardware» more  ICCAD 2004»
14 years 1 months ago
DynamoSim: a trace-based dynamically compiled instruction set simulator
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
Massimo Poncino, Jianwen Zhu
CGO
2003
IEEE
13 years 10 months ago
Retargetable and Reconfigurable Software Dynamic Translation
Software dynamic translation (SDT) is a technology that permits the modification of an executing program’s instructions. In recent years, SDT has received increased attention, f...
Kevin Scott, Naveen Kumar, S. Velusamy, Bruce R. C...
HOTOS
1997
IEEE
13 years 9 months ago
Run-Time Code Generation as a Central System Service
We are building an operating system in which an integral run-time code generator constantly strives to improve the quality of already executing code. Our system is based on a plat...
Michael Franz