52 search results - page 9 / 11 » Generational Cache Management of Code Traces in Dynamic Opti... |
ESTIMEDIA
2005
Springer
13 years 11 months ago
2005
Springer
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
EUROPAR
2005
Springer
13 years 11 months ago
2005
Springer
Abstract. Understanding and controlling program behavior is a challenging objective for the design of advanced compilers and critical system development. In this paper, we propose ...
PPOPP
2003
ACM
13 years 10 months ago
2003
ACM
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating ...
LCPC
2009
Springer
13 years 10 months ago
2009
Springer
Abstract. Current hardware trends place increasing pressure on programmers and tools to optimize scientific code. Numerous tools and techniques exist, but no single tool is a pana...
LCTRTS
1999
Springer
13 years 9 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...