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SSPR
1998
Springer
13 years 10 months ago
1998
Springer
Abstract. In this paper, we propose a method for recognizing architectural symbols. The method is based on the description of the model through a set of constraints on geometrical ...
FMCAD
2000
Springer
13 years 9 months ago
2000
Springer
Abstract. This paper presents a scalable method for parallel symbolic on-the-fly model checking in a distributed memory environment. Our method combines a scheme for on-the-fly mod...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
This paper presents a new method to automatically generate posynomial symbolic expressions for the performance characteristics of analog integrated circuits. The coefficient set ...
ICFEM
2009
Springer
13 years 3 months ago
2009
Springer
In this paper we continue the study of a strict extension of the Computation Tree Logic, called graded-CTL, recently introduced by the same authors. This new logic augments the sta...
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
We present a methodology for generating black-box timing models for full-custom transistor-level CMOS circuits. Our approach utilizes transistor-level ternary symbolic timing simu...