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» Global Lower Bounds for the VLSI Macrocell Floorplanning Pro...
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ISPD
2004
ACM
189views Hardware» more  ISPD 2004»
13 years 10 months ago
Almost optimum placement legalization by minimum cost flow and dynamic programming
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
Ulrich Brenner, Anna Pauli, Jens Vygen