126 search results - page 2 / 26 » Global optimization techniques for automatic parallelization... |
PPOPP
2009
ACM
14 years 5 months ago
2009
ACM
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
TSE
2010
13 years 3 months ago
2010
Search based optimization techniques have been applied to structural software test data generation since 1992, with a recent upsurge in interest and activity within this area. How...
SIGMOD
2011
ACM
12 years 7 months ago
2011
ACM
We address the problem of making online, parallel query plans fault-tolerant: i.e., provide intra-query fault-tolerance without blocking. We develop an approach that not only achi...
ICPPW
2008
IEEE
13 years 11 months ago
2008
IEEE
Chip multiprocessors (CMP) are widely used for high performance computing. Further, these CMPs are being configured in a hierarchical manner to compose a node in a cluster system....