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» Good Architecture = Good (ADL Practices)
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DAC
2008
ACM
14 years 6 months ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada
EVOW
2010
Springer
14 years 2 days ago
Grammatical Evolution Decision Trees for Detecting Gene-Gene Interactions
DEODHAR, SUSHAMNA DEODHAR. Using Grammatical Evolution Decision Trees for Detecting Gene-Gene Interactions in Genetic Epidemiology. (Under the direction of Dr. Alison Motsinger-Re...
Sushamna Deodhar, Alison A. Motsinger-Reif
PET
2010
Springer
13 years 9 months ago
Collaborative, Privacy-Preserving Data Aggregation at Scale
Combining and analyzing data collected at multiple locations is critical for a wide variety of applications, such as detecting and diagnosing malicious attacks or computing an acc...
Benny Applebaum, Haakon Ringberg, Michael J. Freed...
ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
13 years 7 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson
AISS
2010
117views more  AISS 2010»
13 years 2 months ago
A Geospatial Service Approach towards the Development of a Debris Flow Early-warning Systems
Disaster prevention and management is a complicated task that often involves a tremendous volume of heterogeneous data from various resources. With its dynamic and distributed nat...
Min-Lang Huang, Jung-Hong Hong