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» Graphs and Circuits: Some Further Remarks
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DAGSTUHL
2006
13 years 6 months ago
Graphs and Circuits: Some Further Remarks
We consider the power of single level circuits in the context of graph complexity. We first prove that the single level conjecture fails for fanin-2 circuits over the basis {, , 1...
Stasys Jukna
DM
2010
144views more  DM 2010»
13 years 4 months ago
Balanced Cayley graphs and balanced planar graphs
A balanced graph is a bipartite graph with no induced circuit of length 2 (mod 4). These graphs arise in linear programming. We focus on graph-algebraic properties of balanced gra...
Joy Morris, Pablo Spiga, Kerri Webb
TCS
2002
13 years 4 months ago
Some permutation routing algorithms for low-dimensional hypercubes
Oblivious permutation routing in binary d-cubes has been well studied in the literature. In a permutation routing, each node initially contains a packet with a destination such th...
Frank K. Hwang, Y. C. Yao, Bhaskar DasGupta
ASPDAC
2007
ACM
124views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...
Ajay K. Verma, Paolo Ienne
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
13 years 9 months ago
FSM decomposition by direct circuit manipulation applied to low power design
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
José C. Monteiro, Arlindo L. Oliveira