18 search results - page 1 / 4 » Guidance of Loop Ordering for Reduced Memory Usage in Signal... |
VLSISP
2008
13 years 4 months ago
2008
Data dominated signal processing applications are typically described using large and multi-dimensional arrays and loop nests. The order of production and consumption of array ele...
DAC
2003
ACM
2003
ACM
A complexity effective communication model for behavioral modeling of signal processing applications
14 years 5 months ago
In this paper, we argue that the address space of memory regions that participate in inter task communication is over-specified by the traditional communication models used in beh...
TJS
2002
13 years 4 months ago
2002
A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. In...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
TCSV
2008
13 years 4 months ago
2008
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...