Sciweavers

12 search results - page 1 / 3
» HDL-Based Modeling of Embedded Processor Behavior for Retarg...
Sort
View
ISSS
1998
IEEE
117views Hardware» more  ISSS 1998»
13 years 8 months ago
HDL-Based Modeling of Embedded Processor Behavior for Retargetable Compilation
The concept of retargetability enables compiler technology to keep pace with the increasing variety of domain-speci c embedded processors. In order to achieve user retargetability,...
Rainer Leupers
ASPDAC
1999
ACM
98views Hardware» more  ASPDAC 1999»
13 years 8 months ago
Generation of Interpretive and Compiled Instruction Set Simulators
Abstract Due to the large variety of di erent embedded processor types, retargetable software development tools, such as compilers and simulators, have received attention recently....
Rainer Leupers, Johann Elste, Birger Landwehr
DATE
2004
IEEE
181views Hardware» more  DATE 2004»
13 years 8 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...
SAMOS
2004
Springer
13 years 9 months ago
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Ra...
CODES
1999
IEEE
13 years 8 months ago
A unified formal model of ISA and FSMD
In this paper, we develop a formal framework to widen the scope of retargetable compilation. The goal is achieved by the unification of architectural models for both the processor...
Jianwen Zhu, Daniel Gajski