Sciweavers

12 search results - page 3 / 3
» HDL-Based Modeling of Embedded Processor Behavior for Retarg...
Sort
View
LCTRTS
2010
Springer
14 years 19 days ago
Versatile system-level memory-aware platform description approach for embedded MPSoCs
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
Robert Pyka, Felipe Klein, Peter Marwedel, Stylian...
LCTRTS
2005
Springer
13 years 11 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...