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» HIPIQS: A High-Performance Switch Architecture Using Input Q...
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CCR
2006
122views more  CCR 2006»
13 years 5 months ago
Low complexity, stable scheduling algorithms for networks of input queued switches with no or very low speed-up
The delay and throughput characteristics of a packet switch depend mainly on the queueing scheme and the scheduling algorithm deployed at the switch. Early research on scheduling ...
Claus Bauer
AUTOMATICA
1999
78views more  AUTOMATICA 1999»
13 years 5 months ago
On the speedup required for combined input- and output-queued switching
Architectures based on a non-blocking fabric, such as a crosspoint switch, are attractive for use in high-speed LAN switches, IP routers, and ATM switches. These fabrics, coupled ...
Balaji Prabhakar, Nick McKeown
ISCC
2009
IEEE
163views Communications» more  ISCC 2009»
14 years 2 days ago
Distributed parallel scheduling algorithms for high-speed virtual output queuing switches
Abstract—This paper presents a novel scalable switching architecture for input queued switches with its proper arbitration algorithms. In contrast to traditional switching archit...
Lotfi Mhamdi, Mounir Hamdi
IFIP
2004
Springer
13 years 10 months ago
The Inherent Queuing Delay of Parallel Packet Switches
The parallel packet switch (PPS) extends the inverse multiplexing architecture, and is extensively used as the core of contemporary commercial switches. A key factor in the perfor...
Hagit Attiya, David Hay
SPAA
2006
ACM
13 years 11 months ago
Packet-mode emulation of output-queued switches
Most common network protocols (e.g., the Internet Protocol) work with variable size packets, whereas contemporary switches still operate with fixed size cells, which are easier t...
Hagit Attiya, David Hay, Isaac Keslassy