21 search results - page 2 / 5 » Handling communications in process algebraic architectural d... |
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
ASYNC
2007
IEEE
13 years 8 months ago
2007
IEEE
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
COORDINATION
2009
Springer
14 years 5 months ago
2009
Springer
Process algebras are a set of mathematically rigourous languages with well defined semantics that permit modelling behaviour of concurrent and communicating systems. Verification o...
ICSEA
2007
IEEE
13 years 11 months ago
2007
IEEE
— With the mutual consent to use WSDL (Web Service Description Language) to describe web service interfaces and SOAP as the basic communication protocol, the cornerstone for web ...
EUROMICRO
1999
IEEE
13 years 9 months ago
1999
IEEE
Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial empha...