Sciweavers

Share
559 search results - page 1 / 112
» Hardware Accelerated Power Estimation
Sort
View
DATE
2005
IEEE
98views Hardware» more  DATE 2005»
10 years 18 days ago
Hardware Accelerated Power Estimation
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the ob...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
9 years 10 months ago
GRAAL - A Development Framework for Embedded Graphics Accelerators
This paper presents a versatile hardware/software cosimulation and co-design environment for embedded 3D graphics accelerators. The GRAphics AcceLerator design exploration framewo...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
DAC
2005
ACM
10 years 8 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
FPL
2010
Springer
131views Hardware» more  FPL 2010»
9 years 5 months ago
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
Antonin Hermanek, Michal Kunes, Milan Tichý
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
10 years 1 months ago
A low complexity hardware architecture for motion estimation
This paper tackles the problem of accelerating The rest of this paper is organised as follows: section II motion estimation for video processing. A novel architecture details relat...
Daniel Larkin, Vlenti. Muresan, Noel E. O'Connor
books