25 search results - page 5 / 5 » Hardware Implementation of Temporal Nonmonotonic Logics |
CAV
2005
Springer
13 years 10 months ago
2005
Springer
Bounded model checking is an efficient method for finding bugs in system designs. The major drawback of the basic method is that it cannot prove properties, only disprove them. R...
LICS
2003
IEEE
13 years 10 months ago
2003
IEEE
Probability features increasingly often in software and hardware systems: it is used in distributed co-ordination and routing problems, to model fault-tolerance and performance, a...
FMCAD
1998
Springer
13 years 9 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
EMSOFT
2006
Springer
13 years 8 months ago
2006
Springer
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
CAV
2005
Springer
13 years 10 months ago
2005
Springer
Model checking has proven to be an effective technology for verification and debugging in hardware and more recently in software domains. We believe that recent trends in both th...