An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
Sensor networks are emerging wireless technologies; their integration with the existing 2.5G, 3G mobile networks is a key issue to provide advanced services, e.g., health control....
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...