339 search results - page 1 / 68 » Hardware Synthesis for Multi-Dimensional Time |
ASAP
2003
IEEE
13 years 10 months ago
2003
IEEE
This paper introduces basic principles for extending the classical systolic synthesis methodology to multi-dimensional time. Multi-dimensional scheduling enables complex algorithm...
ARC
2008
Springer
13 years 7 months ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
ASYNC
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
ICCD
1993
IEEE
13 years 9 months ago
1993
IEEE
ISSS
1999
IEEE
13 years 9 months ago
1999
IEEE
ended tutorial abstract appeared in the Proceedings of the 12th International Symposium On System Synthesis, IEEE, San Jose, CA, USA November, 11, 1999.