Sciweavers

Share
31 search results - page 2 / 7
» Hardware assistance for trustworthy systems through 3-D inte...
Sort
View
ICCAD
2010
IEEE
145views Hardware» more  ICCAD 2010»
11 years 11 months ago
Fuzzy control for enforcing energy efficiency in high-performance 3D systems
3D stacked circuits reduce communication delay in multicore system-on-chips (SoCs) and enable heterogeneous integration of cores, memories, sensors, and RF devices. However, vertic...
Mohamed M. Sabry, Ayse Kivilcim Coskun, David Atie...
DATE
2009
IEEE
146views Hardware» more  DATE 2009»
12 years 8 months ago
System-level power/performance evaluation of 3D stacked DRAMs for mobile applications
Abstract—Convergence of communication, consumer applications and computing within mobile systems pushes memory requirements both in terms of size, bandwidth and power consumption...
Marco Facchini, Trevor Carlson, Anselme Vignon, Ma...
ISPD
2011
ACM
253views Hardware» more  ISPD 2011»
11 years 4 months ago
Assembling 2D blocks into 3D chips
Three-dimensional ICs promise to significantly extend the scale of system integration and facilitate new-generation electronics. However, progress in commercial 3D ICs has been s...
Johann Knechtel, Igor L. Markov, Jens Lienig
3DIC
2009
IEEE
184views Hardware» more  3DIC 2009»
12 years 8 months ago
Architectural evaluation of 3D stacked RRAM caches
The first memristor, originally theorized by Dr. Leon Chua in 1971, was identified by a team at HP Labs in 2008. This new fundamental circuit element is unique in that its resis...
Dean L. Lewis, HsienHsin S. Lee
DFT
2006
IEEE
143views VLSI» more  DFT 2006»
12 years 7 months ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
books