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» Hardware code generation from dataflow programs
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ESTIMEDIA
2007
Springer
13 years 11 months ago
Data-Parallel Code Generation from Synchronous Dataflow Specification of Multimedia Applications
Embedded software design for MPSoC needs parallel programming. Popular programming languages such as C and C++ are not adequate for initial specification since they are designed f...
Seongnam Kwon, Choonseung Lee, Soonhoi Ha
CODES
1998
IEEE
13 years 9 months ago
Domain-specific interface generation from dataflow specifications
In this paper, the problem of automatically mapping large-grain dataflow programs onto heterogeneous hardware/softwarearchitectures is treated. Starting with a given hardware/soft...
Michael Eisenring, Jürgen Teich
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 9 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
ISCA
2006
IEEE
138views Hardware» more  ISCA 2006»
13 years 11 months ago
Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs
We present Program Demultiplexing (PD), an execution paradigm that creates concurrency in sequential programs by "demultiplexing" methods (functions or subroutines). Cal...
Saisanthosh Balakrishnan, Gurindar S. Sohi
ISSS
1999
IEEE
149views Hardware» more  ISSS 1999»
13 years 9 months ago
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
Praveen K. Murthy, Shuvra S. Bhattacharyya