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ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
14 years 2 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
ICCAD
2007
IEEE
107views Hardware» more  ICCAD 2007»
14 years 7 months ago
Computation of minimal counterexamples by using black box techniques and symbolic methods
— Computing counterexamples is a crucial task for error diagnosis and debugging of sequential systems. If an implementation does not fulfill its specification, counterexamples ...
Tobias Nopper, Christoph Scholl, Bernd Becker
DAC
2006
ACM
14 years 11 months ago
State encoding of large asynchronous controllers
A novel method to solve the state encoding problem in Signal Transition Graphs is presented. It is based on the structural theory of Petri nets and can be applied to large specifi...
Josep Carmona, Jordi Cortadella
ASPDAC
2008
ACM
168views Hardware» more  ASPDAC 2008»
14 years 23 days ago
A fast two-pass HDL simulation with on-demand dump
- Simulation-based functional verification is characterized by two inherently conflicting targets: the signal visibility and simulation performance. Achieving a proper trade-off be...
Kyuho Shim, Youngrae Cho, Namdo Kim, Hyuncheol Bai...
ACSD
2003
IEEE
105views Hardware» more  ACSD 2003»
14 years 2 months ago
Detecting State Coding Conflicts in STG Unfoldings Using SAT
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev